Weekly Quiz

• You can use ChatGPT to help you answer the weekly quizzes. You will not be permitted to use it during exams.
• You can only use it after the two attempts are used up. Each quiz permits 5 attempts.
• ChatGPT will include explanations for the answers it gives. Make sure you understand the explanation before you use it.
• If you do use ChatGPT, we will appreciate it if you filled out this anonymous form so that we know how it is working out for you. ChatGPT Form
• Beware that ChatGPT might exhibit hallucinations and relying on it blindly might in many cases to incorrect answers.
• However, if you are stuck and cannot figure out the answer, you can use ChatGPT to help you and check the explanation.

An example of useful chatgpt prompt

An example why you should not blindly trust ChatGPT The instruction below is a lbu (load-byte unsigned), but chatgpt confused it for a floating point load word. While it gets the fact that semantically both are reading from memory, clearly this is incorrect.

Quizes

• Week 1 - 2
• Week 3 - 6
• Canvas is typically sensitive to answer formats (as it is simply pattern matching). We can handle some options but not all. So be careful.
  • Decimal simply write number e.g., let us say memory word is 0x00000001 simply write 1
  • Hexadecimals have to consider field width e.g., for 12 bit 0x001 but for 13 bit it will be 0x0001
  • For hexadecimal prefix 0x. For binary prefix 0b . For decimal nothing.

Detailed explanation for the more challenging questions on the quizes can be found here

The midterm and final will be administered on canvas in the quiz format (FIB,Multiple choice, True/False etc) Sample midterms/final below are for practice only and indicate type of questions

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This is a short-list (but not complete list) of concepts that cab help you compete on the midterm. Make sure you are trying out the questions on quizzes and revise the slide decks. Often you will have to combine multiple concepts to solve a single question.

1. Pointer Arithmetic and Memory Addressing:

   • Understanding of pointer arithmetic and how to access memory locations.
   • Working with pointers to different data types (short, char, array, multi-dimensional arrays).
   • Knowledge of endianness (little-endian in particular).
   • Arrays (Multi-level, Nested, 1D,2D,3D). How to access elements.

2. Bitwise Operations:

   • Revising bitwise operators (!, ~, &, ^, |, <<, >>).
   • Understanding how to create or manipulate bit patterns, and how to use masking and shifts effectively to extract and set bits.
   • Practice encoding and decoding patterns using bitwise operations.

3. Number Representation:

   • Two's complement values. How to compare them e.g., > , <
   • Understanding hexadecimal and binary number representations, and how to comparesigned values.

4. Structs and Linked Data Structures:

   • Using pointers to access and manipulate data in structures (e.g., linked lists).
   • Understanding relationships between nodes and navigating linked structures using pointers.
   • struct alignment and padding rules

5. Stack and Register Management:

   • Familiarity with which registers need to be saved during different points of function calls.
   • Calculating the number of bytes allocated on the stack.
   • Practice with stack frame allocation and register management in function calls.

6. RISC-V Assembly:

   • Encoding RISC-V instructions manually.
   • Understanding instruction format fields such as rs1, rs2, rd, and immediate values.
   • Working with new instructions and understanding their behavior, including conditional statements.
   • Working with loads and stores (What is the difference between lw vs st and li)

7. Floating-Point Representation:

   • Encoding and decoding IEEE-like floating-point values.
   • Calculating bias, minimum and maximum exponent values.
   • Understanding how to convert between binary and floating-point values.

8. Arrays and Index Calculations:

   • Addressing individual elements within an array given its starting address.
   • Working with multi-dimensional arrays and calculating offsets.

Based on the final exam content you've shared, here are the key concepts students should focus on for the computer organization course:

1. Virtual Memory:

   • Translation Lookaside Buffer (TLB) concepts: Understanding TLB hit/miss, TLB structure, and interpreting TLB entries.
   • Virtual to Physical Address Translation: VPN, PPN, page tables, and address mapping.

2. Memory Hierarchy:

   • Cache Organization: Cache hit/miss, direct-mapped vs. set-associative caches.
   • Understanding cache structures like sets, ways, hit ratio calculations, and behavior under different loops.
   • Impact of cache policies like write-back and write-allocate.

3. RISC-V Assembly and Encoding:

   • RISC-V Instruction Encoding: Instruction format, fields like opcode, rs1, rs2, rd.
   • Understanding and encoding new instructions, such as badd (branch and add).
   • Single-cycle and pipeline datapath modifications for custom instructions.

4. Pipeline Hazards:

   • Data hazards and control hazards: Identifying and handling pipeline hazards in a 5-stage pipeline.
   • Pipeline forwarding, stalling, and calculating the number of cycles to execute a program.
   • Branch prediction and handling branch hazards.

5. Cache Performance:

   • Calculating cache hit ratios for different scenarios.
   • Understanding cache conflicts and the difference between direct-mapped and set-associative cache in performance.
   • Evaluating loop performance on different cache configurations.

6. CPU Datapath and Control Signals:

   • Control signal modifications to accommodate new instructions.
   • Use of multiplexers (mux), register file access, and signals like RegWen.
   • Understanding how changes to the datapath impact the correct execution of new and existing instructions.

7. RISC-V Pipeline Performance:

   • Impact of pipeline stages (Fetch, Decode, Execute, Memory, Writeback) and the role of forwarding and stalling.
   • Understanding the timing and sequencing of instructions through the pipeline.
   • Evaluating cycle counts for pipelined and non-pipelined CPUs.